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[[File:NANDgate.png|left]] | [[File:NANDgate.png|left]] | ||
The '''NAND gate''' accepts two inputs. It is generally equivalent to an AND gate immediately followed by an inverter. If both input signals are ON, the output signal will be OFF. Otherwise, the output signal will be ON. | The '''NAND gate''' accepts two inputs. It is generally equivalent to an AND gate immediately followed by an inverter. If both input signals are ON, the output signal will be OFF. Otherwise, the output signal will be ON. | ||
Oddly enough, no corresponding NOR gate for OR is provided. NAND being provided at all may just be a demonstration of [[NAND logic]]; perhaps, if CC2 development were slightly different, we would've ended up with only NOR gates, as a separate demonstration of [[NOR logic]]. | |||
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