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== Tiles that accept signal input ==
== Tiles that accept signal input ==
 
A value of ''pulse'' in the ''toggle type'' column indicates that the tile only needs one [[frame]] of signal to toggle (i.e. only changes state when signal changes from OFF to ON), while ''steady'' indicates that the tile will be toggled only when the signal is active (i.e. changes state on both off-to-on and on-to-off transitions).
A value of ''pulse'' in the ''toggle type'' column indicates that the tile only needs one frame of signal to toggle (i.e. only changes state when signal changes from OFF to ON), while ''steady'' indicates that the tile will be toggled only when the signal is active (i.e. changes state on both off-to-on and on-to-off transitions).


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{{clear}}
{{clear}}
== Gates ==
== Gates ==
Gates are tiles that use existing signals to create new signals. They otherwise [[acting floor|behave like floor]], except that [[ice block]]s cannot melt on them, even though they cannot be destroyed by [[time bomb]]s (and therefore cannot be replaced by [[fire]] if a monster is on it). The lightning bolt has no effect on these tiles.
Gates are tiles that use existing signals to create new signals. They otherwise [[acting floor|behave like floor]], except that [[ice block]]s cannot melt on them, even though they cannot be destroyed by [[time bomb]]s (and therefore cannot be replaced by [[fire]] if a monster is on it). The lightning bolt has no effect on these tiles.


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[[File:NANDgate.png|left]]
[[File:NANDgate.png|left]]
The '''NAND gate''' accepts two inputs. It is generally equivalent to an AND gate immediately followed by an inverter. If both input signals are ON, the output signal will be OFF. Otherwise, the output signal will be ON.
The '''NAND gate''' accepts two inputs. It is generally equivalent to an AND gate immediately followed by an inverter. If both input signals are ON, the output signal will be OFF. Otherwise, the output signal will be ON.
The point of including a NAND gate when an inverter can simply be placed after a regular AND gate, aside from speed and compactness, may be to demonstrate [http://en.wikipedia.org/wiki/NAND_logic NAND logic]: all other logic gates can be constructed with only combinations of NAND gates. Its inclusion over a NOR gate would be arbitrary, as similar [http://en.wikipedia.org/wiki/NOR_logic NOR logic] exists.


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=== Other gates ===
=== Other gates ===
==== Counter ====
==== Counter ====
{{Infobox Tile
{{Infobox Tile
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|colspan=3|'''INPUT''' || '''OUTPUT'''
|colspan=3|'''INPUT''' || '''OUTPUT'''
|-  style="background:#def; text-align:center;"
|-  style="background:#def; text-align:center;"
| Latch || Data || Output (previous frame) || Output (current frame)
| Latch || Data || Output (previous [[frame]]) || Output (current frame)
|-  style="background:#dfd; text-align:center;"
|-  style="background:#dfd; text-align:center;"
|0 || 0 || 0 || 0
|0 || 0 || 0 || 0
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=== Timing and loops ===
=== Timing and loops ===
At the start of a level, all inputs and outputs are OFF. On every frame after the first, all gates produce output based on their inputs from the ''previous'' frame. Because of this, each gate is considered to have a 1-frame "delay". For example, an AND gate followed by a NOT gate have a combined 2-frame delay, whereas a NAND gate only has a 1-frame delay, and therefore is not exactly equivalent even though the logic is the same. As another example, a chain of OR gates of length N will have an N-frame delay. This can be used to precisely control the timing and activation of various objects and parts of circuits.
At the start of a level, all inputs and outputs are OFF. On every frame after the first, all gates produce output based on their inputs from the ''previous'' frame. Because of this, each gate is considered to have a 1-frame "delay". For example, an AND gate followed by a NOT gate have a combined 2-frame delay, whereas a NAND gate only has a 1-frame delay, and therefore is not exactly equivalent even though the logic is the same. As another example, a chain of OR gates of length N will have an N-frame delay. This can be used to precisely control the timing and activation of various objects and parts of circuits.



Latest revision as of 17:47, 1 January 2021

Wire is a mechanic introduced in Chip's Challenge 2. It's technically not a tile, but instead enables floor and steel walls to carry a signal between various game elements. Pink buttons, black buttons, and logic gates are capable of outputting a signal, and many more tiles can take signal as input. Wires will also be activated if a movable object steps on it while equipped with the lightning bolt. Wire tunnels can send current across the map.

Blue teleports can be connected together with wire. If a movable object enters such a teleport network, it must exit a teleport in the same network. All unwired blue teleports function together as one network, although due to a glitch, it is possible for an unwired teleport to send objects to a wired teleport. Logic gates can act as one-ways on a network. Signal only affects whether logic gates function as one-ways or as gaps in the wire.

The lightning bolt, when equipped by a moving object, will supply signal to a wire while the object is stopped on one. The lightning bolt has no effect on wires that are already activated.

Wire tunnel[edit]

A wire tunnel is a wire modifier that allows current going into it to jump across any number of tiles. Wire tunnels work in pairs: for two tunnels to connect to each other, they must face each other and be in the same row or column, depending on whether they are horizontal or vertical, respectively. Multiple wire tunnel pairs on the same row or column work like parentheses: innermost pairs always connect, then the next innermost pairs, and so on. If a wire tunnel cannot find another to pair with on its row or column, it remains unpaired.

It is possible to remove the wire from a wire tunnel, as shown in the picture on the right. These tunnels behave as one would expect; they connect to other tunnels (wired or not) in the same way, and effectively end the wire on the other side if there is one. Consequently, these are not particularly useful in level design.

Tiles that accept signal input[edit]

A value of pulse in the toggle type column indicates that the tile only needs one frame of signal to toggle (i.e. only changes state when signal changes from OFF to ON), while steady indicates that the tile will be toggled only when the signal is active (i.e. changes state on both off-to-on and on-to-off transitions).

Tile Toggle type
Force floors pulse
Swivel doors pulse
Toggle walls pulse
Red teleports steady
Flame jets pulse
Transmogrifiers steady
Clone machines pulse
Traps steady
Railroad tracks pulse
Switch doors steady

Buttons and switches[edit]

See the article on buttons for more detailed information.

Pink button[edit]

The pink button is a button introduced in Chip's Challenge 2. While held by a movable object, it activates any wire it is connected to.

Pink buttons do not relay currents, unlike black buttons and blue teleports.

Black button[edit]

The black button is a button introduced in Chip's Challenge 2. It has the opposite behavior of a pink button: it activates any wire it is connected to except while held by a movable object.

If a black button receives a current from any side, it will relay that current to the side opposite of that from which it is received.

Black buttons only switch from powered to unpowered, and vice versa, when they detect something moving onto or off of them. Destroying an entity holding down a black button using a bowling ball or dynamite will keep the button pressed, because the destroyed entity never actually moved off of the button. As soon as another entity steps onto the black button, its behavior goes back to normal. This does not occur with pink buttons. Something similar to this can happen with orange buttons, but the affected flame jet will reverse its on/off polarity as though activated by a wire.

Switch[edit]

The switch is a special tile in Chip's Challenge 2. When set to the on position, a current will be output through wire that is connected to the switch. When set to the off position, no current will be output. Switches can be toggled by any movable object.

Gates[edit]

Gates are tiles that use existing signals to create new signals. They otherwise behave like floor, except that ice blocks cannot melt on them, even though they cannot be destroyed by time bombs (and therefore cannot be replaced by fire if a monster is on it). The lightning bolt has no effect on these tiles.

Logic gates[edit]

Logic gates perform a logical operation on one or two wire inputs and produce a single output. They consist of the inverter, AND gate, OR gate, NAND gate, and XOR gate. There also exist diodes, NOR gates, and XNOR gates, but these are not present in Chip's Challenge 2.

Note that often times the term "logic gate" is used to refer to any gate, including latches and counters (see below).

Inverter[edit]

NOTgate.png

The inverter, also called the NOT gate, accepts a single input and inverts the signal. If its input signal is ON, the output signal will be OFF. If its input signal is OFF, the output signal will be ON.

INPUT OUTPUT
A NOT A
0 1
1 0

AND gate[edit]

ANDgate.png

The AND gate accepts two inputs. If both inputs signals are ON, the output signal will be ON. Otherwise, the output signal will be OFF.

INPUT OUTPUT
A B A AND B
0 0 0
0 1 0
1 0 0
1 1 1

OR gate[edit]

ORgate.png

The OR gate accepts two inputs. If at least one of the input signals are ON, the output signal will be ON. Otherwise, the output signal will be OFF.

INPUT OUTPUT
A B A OR B
0 0 0
0 1 1
1 0 1
1 1 1

NAND gate[edit]

NANDgate.png

The NAND gate accepts two inputs. It is generally equivalent to an AND gate immediately followed by an inverter. If both input signals are ON, the output signal will be OFF. Otherwise, the output signal will be ON.

The point of including a NAND gate when an inverter can simply be placed after a regular AND gate, aside from speed and compactness, may be to demonstrate NAND logic: all other logic gates can be constructed with only combinations of NAND gates. Its inclusion over a NOR gate would be arbitrary, as similar NOR logic exists.

INPUT OUTPUT
A B A NAND B
0 0 1
0 1 1
1 0 1
1 1 0

XOR gate[edit]

XORgate.png

The XOR gate gate accepts two inputs and performs an exclusive or operation. If one or the other of the two input signals is ON, the output signal will be ON. If neither input signals are ON or both input signals are ON, the output signal will be OFF.

INPUT OUTPUT
A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0

Other gates[edit]

Counter[edit]

The counter is a gate with two inputs and two outputs. A pulse that enters the counter from the right side will increment it by one and from the bottom side will decrement it by one. If the counter is incremented while at 9, it will overflow, output a pulse to the left side, and wrap to 0. If the counter is decremented while at 0, it will underflow, output a steady signal to the top side, and wrap to 9. This steady signal remains until the counter receives another pulse from either input.

Latch[edit]

The latch gate has two inputs and one output. The arrow points from the data input to the output, and the input on the opposite side is the latch input. As long as the latch input has a signal, the output will be the same as the data input. When the latch input has no signal, the output will stay the same as it was when the latch input last had a signal. Latch gates can be thought of as storage for one bit of memory. Wikipedia calls this gate a D gated latch or D flip-flop.[1]

INPUT OUTPUT
Latch Data Output (previous frame) Output (current frame)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

Note that "Output (previous frame)" is internal, and not necessarily the state of the wire connected to the gate's output.

The second latch pictured to the right is a mirror image of the first latch, used to keep the game elements symmetrical.

Timing and loops[edit]

At the start of a level, all inputs and outputs are OFF. On every frame after the first, all gates produce output based on their inputs from the previous frame. Because of this, each gate is considered to have a 1-frame "delay". For example, an AND gate followed by a NOT gate have a combined 2-frame delay, whereas a NAND gate only has a 1-frame delay, and therefore is not exactly equivalent even though the logic is the same. As another example, a chain of OR gates of length N will have an N-frame delay. This can be used to precisely control the timing and activation of various objects and parts of circuits.

This also leads to interesting behavior when logic gates feed into themselves or each other. For example, an OR gate with its output wired to one of its inputs, once triggered, will output ON permanently, and an inverter wired to itself will toggle its output every frame.

In Crazy II, there is a loop consisting of one inverter and two OR gates, which has a 6-frame (0.1-second) cycle: each wire segment is ON for 3 frames, then OFF for 3 frames. This feeds into a counter gate, causing it to output a pulse every 60 frames, or once per second. This in turn feeds into several more counter chains. As a consequence, each of these chains functions as a clock counting down seconds in real time.

References[edit]